1. Field of the Invention
The present invention relates to a circuit arrangement with at least two bipolar transistors connected together at their base electrodes, each having an emitter resistor and connected to a reference potential for supply voltages.
2. Description of the Related Art
In an integrated circuit, pinch resistors are created when a region of relatively high resistance is made very thin or narrow by a depletion layer. The reverse voltage then influences the value of the resistance over the breadth of the depletion zone. In bipolar standard technology, two types of pinch resistor are employed. So-called n-conductive pinch resistors are made from an epitaxial layer by a process whereby a narrow zone is isolated by insular diffusion and is not only covered at the ends, which are needed for the contact windows, but also from the surface by means of a p-implantation. This results in a channel of n-conductive high-resistance material in a surrounding p-conductive environment that belongs to the substrate. Such pinch resistors are used as current-stabilizing series resistors because their resistance increases as the voltage rises. P-conductive pinch resistors, however, are made by the p-implantation or p-diffusion method which is also used for the base of npn transistors. By covering with the n.sup.+ -implantation for the emitter, a buried high-resistance p-layer results which can be made into a resistor by providing contacts at the ends left open. The surrounding n-conductive material is that of the epitaxial layer which in turn can be isolated by insular diffusion and provided with a contact. This contact serves as gate electrode for the pinch resistor. Such p-conductive pinch resistors from the base implantation thus have the advantage of having an electrically free gate electrode.
The structure of this pinch resistor is equivalent to that of a JFET (junction or junction-gate FET). However, because the breakdown voltage of the emitter-base junction is lower than the pinch-off voltage, these elements cannot be used as conventional JFETs. A very grave disadvantage for a more advanced application of pinch resistors is the wide spread of the resistance value which, under the technological conditions commonly encountered, can cover a range of 1:3, rather like the current gain of the transistors found on a chip.
In bipolar circuits for very low supply voltages, there is the problem that the input voltage ranges that can be processed become very small. If one considers, for example, a simple npn transistor in common-emitter configuration, then the input voltage supplied to the base must have at least the value of the base-emitter voltage together with an allowance for the generally unavoidable emitter resistance. The upper limit is established by the supply voltage and the voltage required for an output configuration of the transistor. With a minimum supply voltage of 1.2 V, for example, only a few 100 mV remain for the permissible input voltage range. This restriction is in contrast to the attainable output voltage ranges which, with a complementary output stage, can approach the value of the supply voltage to within a few 100 mV. In a circuit with 1.5 V supply voltage, one can therefore easily achieve an output range of 1.2 V, but an input of scarcely 0.5 V. In isolation amplifiers, integrators, impedance transformers, etc., this often causes considerable difficulties in dimensioning.
Another disadvantage, especially in circuits with memory function or deep lower cut-off frequency, is presented by the input currents that are required in a bipolar technology configuration for the bases of the input transistors. This reduces, for example, the storage times that can be achieved in a sample-and-hold circuit or in an integrator and this is further worsened by the small voltage ranges mentioned above.